1.Brief Introduction
Designed to comply with IEC 61158-2
Has physical layer and some function of link layer
Good at integration, simple external circuit, small size
Available in 44-pins TQFP package
Internal 4k bytes asynchronous SRAM
storage data for transmitting, receiving
and address lookup table
Low power consumption design<600UA
Available for developing the products with FF H1,PROFIBUS PA
2.Performance Characteristic
Supports line data rate 31.25K BIT/S
Build-in Manchester Encoder/Decoder
Transmitter Jibber inhibit, receiver super long frame inhibit
Automatic parity recognition and correction
Build-in two channels DMA controller,used to control data transmitting, receiving and address recognition
Build-in bus arbiter, CPU accessing internal SRAM correctly
Internal loop back for t: -40~85
Features
FBC0409 is designed for fieldbus physical and part data link communication
functions, details list below:
Supports line data rate 31.25K Bit/S
Build-in Manchester Encoder/Decoder
Transmitter Jibber inhibit, receiver super long frame inhibit
Automatic parity recognize and correct
Message type and destination address detection automatically
Automatic transmitter and receiver frame check
Build-in three channels DMA controller,used to control data transmitting,
receiving and address recognization looking up table memory management
4k bytes asynchronous SRAM internal as communication buffer for transmitting,
receiving and address lookup table memory
Length of Preamble, Start and Stop delimiter under software controlled
Build-in bus arbiter, CPU accessing internal SRAM correctly
Data link layer timer ( 1ms,1/32 ms,octet time timer )
Designed lots of useful interrupt and status Registers
Compatibility with INTEL,ARM serials CPU
Internal loop back for test
STANDBY feature
Power supply: 2.7~5.5V
Power consumption: <600uA
Fieldbus Communication Controller (two channel DMA controller & 4k bytes SRAM)